Electronic Component Solutions

Wireless Clocks Supporting 4G/LTE and Ethernet

Silicon Labs introduced a new family of high-performance, multi-channel jitter attenuating clocks for 4.5G and Ethernet-based Common Public Radio Interface (eCPRI) wireless applications. The new Si5381/82/86 clocks leverage Silicon Labs’ proven DSPLL technology to deliver an advanced timing solution that combines 4G/LTE and Ethernet clocking in a single IC. These highly integrated clocks eliminate the need for multiple clock devices and voltage-controlled crystal oscillators (VCXOs) in demanding applications including small cells, distributed antenna systems (DAS), m-BTS, baseband units (BBU) and fronthaul/backhaul equipment.

Features:

  • Digital frequency synthesis eliminates external VCXO and analog loop filter components
  • Jitter performance <100fs RMS typ (12 kHZ – 20 MHz)
  • Input frequency range:
    – Differential: 10 MHz – 750 MHz
    – LVCMOS: 10 MHz – 250 MHz
  • Integrated crystal oscillator
  • 1, 2, and 4 DSPLL options
  • Selectable loop bandwidth
  • Status monitoring: LOL, LOS, OOF
  • In-circuit programmable via SPI and I2C
  • Output frequency range:
    – Wireless DSPLL: 480 kHz – 2.94912 GHz
    – Any-rate DSPLL: 480 kHz – 712.5 MHz

Devices
Part Number Customize Data Sheet Dev KIt Input Frequency (MHz) Output Frequency (MHz) Output Format(s) Description Control Reference Inputs Phase Jitter (RMS) (ps) VDD (V) VDDO (V) Package Type Package Size (mm) 4G/LTE Wireless Clocks Input Frequency Min (MHz) (MHz) Output Frequency Max (MHz) (MHz)

Si5380A

Customize Si5380-D-EVB 10 750 0.48 1474.56 CML; HCSL; LVCMOS; LVDS; LVPECL Ultra-Low Phase Noise, Wireless Jitter Attenuating Clock Multiplier I2C/SPI 4 0.065 1.8; 2.5; 3.3 1.8; 2.5; 3.3 QFN64 9×9 Yes 10 750 1474.56

Si5381E

Customize Si5381E-E-EVB 0.008 750 0.0001 2949.12 CML; HCSL; LVCMOS; LVDS; LVPECL Ultra-Low Phase Noise, Dual-PLL Wireless Jitter Attenuating Clock Multiplier I2C/SPI 4 0.065 1.8; 2.5; 3.3 1.8; 2.5; 3.3 QFN64 9×9 Yes 0.008 750 2949.12

Si5382E

Customize Si5382E-E-EVB 0.008 750 0.0001 2949.12 CML; HCSL; LVCMOS; LVDS; LVPECL Ultra-Low Phase Noise, Multi-PLL Wireless Jitter Attenuating Clock Multiplier I2C/SPI 4 0.065 1.8; 2.5; 3.3 1.8; 2.5; 3.3 QFN64 9×9 Yes 0.008 750 2949.12

Si5386E

Customize Si5386E-E-EVB 0.008 750 0.0001 2949.12 CML; HCSL; LVCMOS; LVDS; LVPECL Ultra-Low Phase Noise, Wireless Jitter Attenuating Clock Multiplier I2C/SPI 4 0.065 1.8; 2.5; 3.3 1.8; 2.5; 3.3 QFN64 9×9 Yes 0.008 750 2949.12

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