Clock and Data Distribution

Clock and Data Distribution

Microchip offers one of the most extensive arrays of clock distribution product lines in the industry. Ranging from 2 to 22 outputs, they support differential (LVPECL, LVDS, HCSL, CML) and single-ended CMOS outputs, and have a maximum clock rate of 7.0 GHz and data rate of 10.7 Gbps, with very low additive jitter.
Microchip’s clock distribution family consist of TCXO fanout buffers, crystal or reference input fanout buffers, signal translators, cross-point switches, high-performance clock dividers, receiver-buffer drivers, multiplexers, delay lines and logic gates.

 

Fan Out Buffers and Drivers

 

  • 2 to 22 outputs offered
  • Supports differential and single-ended solutions
  • Up to 7.0 GHz clock rate and 10.7 Gbps data rate

Zero-Delay Buffers

 

  • High performance: low skew, low jitter
  • Capable of distributing high speed and spread spectrum clocks

PCIe Buffers

 

  • Gen 1, 2, 3 compliant
  • 2 to 19 outputs

Multiplexers and Crosspoint Switches

 

  • Available in 2 x 2 mm , 4 x 4 mm packages
  • Dual 2 x 2 configurations up to 7 GHz with ultra-low jitter performance

Logic Translators

 

  • Supports clock or data rates to 7 GHz
  • Enable conversion from single-ended to differential

Skew Management

 

  • Programmable delay with fine tune control
  • Single or dual channels

Registers and Flip-Flops

 

  • Up to 9-bit hold/shift registers
  • Triple/Hex D flip-flops options

 

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